Introduction

Within the SCALOPES project, the work is organized as a matrix. There are four vertical work-packages, focusing on steering the developments and proving the applicability of the results towards a particular application domain. These are the application work packages (WPA). There are four horizontal work-packages, which are focusing on specific developments in the design chain for this type of applications. These are the technology/tool development work packages (WPT). The goal is to make the solutions as generic as possible in a cross-application way. However in some particular cases domain- or application-specific developments or extensions will be needed in the development. There is one additional technology / tool development work package, which will identify commonalities between the resulting architectures for the application domains. Below you find the description of the Application Work Packages and the Technology/Tool development Work Packages.

WPT1

Since future low-power MP-SoCs are complex, heterogeneous multi-processor systems that are also becoming increasingly adaptive, designers are confronted with the immense challenge to efficiently and effectively execute applications onto these systems. To address this challenge, the objective of WPT1 is to study and develop appropriate application and programming models, as well as accompanying mapping technology, that support:

  • Identification and formalisation of application characteristics that need to be taken into account by the SCALOPES runtime resource management system.
  • High-level performance and power modeling and analysis of concurrent applications in order to facilitate early design space exploration (e.g. to perform HW/SW partitioning of applications to optimize for low power).
  • Creation of concurrent applications out of sequential code in order to be able to distribute applications over multiple processors and to reduce power by selective power reduction.

WPT2

The Objectives of WPT2 are the development of methods and system extensions to Multi-Processor System-on-Chips to improve their Composability, Predictability and Dependability (CPD). The main concern of the partners in this work package is the convergence of these three platform & development goals with the project's low-power target. The key objectives of WPT2 are:

  • The analysis of CPD requirements on the platform. The analysis includes requirements on the hardware & software components, programming of the platform, and the automation of the platform synthesis and configuration (i.e. design flows / tooling).
  • The definition of CPD components for existing or new platforms to support composability, predictability, and dependability. The platform will contain multiple programmable processors (MPSOC), advanced interconnects, memory hierarchy, and possibly reconfigurable components. It is likely to be heterogeneous to achieve high computation and energy efficiency. This includes design flows.
  • The implementation & modeling of CPD components identified, such as schemes for arbitration, buffering, programming of resources (interconnect, processors, memories). Implementations may be hardware or software (e.g. RTOS/schedulers). Models are required in the design flows.
  • Definition and implementation of design flows to support CPD specifications, modeling, design, synthesis, simulation, configuration, etc. of CPD platform instances.
  • Prototyping of the CPD platform.

WPT3

Resource management (RM) is critically required in multicore computing platforms to ensure efficient utilization of system resources (processing elements, storage, communication and input-outputs) while meeting operational requirements (power, temperature, reliability, predictability) and providing adequate application-level quality of service. To achieve this high-level general goal in the context of multi-core platforms, the key objectives of WP3 are:

  1. To define a novel scalable RM architecture for multicore platforms, providing:
    • Synergistic management of heterogeneous resources: processing elements, complex distributed memory hierarchies and communication networks (on and off- chip);
    • Flexible adaptation to multiple & dynamic application environments, both in terms of deployment contexts (static) and of multiple use cases (dynamic);
    • Scalable composability: support platform derivatives and evolutions with increasing levels of integration and parallelism without major architectural overhauls;
    • Concurrent management of multiple operational metrics: resource management requires multi-objective and constrained optimization to explore trade-offs among many contrasting metrics (e.g. power vs. response time, vs. reliability, etc).
  3. To develop platform-specific RM middle ware, based on the baseline scalable architecture, specifically tuned to the industrial application domains targeted by the project.
  4. To develop RM policies, which leverage the facilities (e.g. "monitors and knobs") offered by the RM architecture and can be calibrated and optimized for application domain requirements.
  5. To quantitatively evaluate and assess the effectiveness of the RM middle-ware and policies on application and platform specific context and use cases to provide detailed guidance to domain specific demonstrators.

WPT4

For the multi-core domain innovative tools are required for high-level system simulation and performance analysis. Focus will be given to the development of tools allowing an early, high level, architectural power, thermal and reliability estimation, implementation cost and resource management for a given application on a given reference platform. These tools will run over the high level model of the system with different configurations in order to fix the best achievable architecture and optimum algorithms utilization.

Key for the computational building blocks of current and future-generation heterogeneous Systems-on-Chip are application-specific processors (ASIPs). WPT4 will investigate better support for low-power optimisation, both at the level of hardware (RTL) generation and in terms of power profiling.

From the methodological viewpoint, many of the methods will be applicable across application domains, but probably require tailoring in each of them. However, to achieve work efficiency the activities in WPT4 will be strongly driven by application requirements coming from WPA1-4, and significant effort will be dedicated on immediately targeting technologies to domain-specific platforms in the application areas of interest. The following are the main, concrete objectives of the WPT4:

  1. Architecture modeling required for power, thermal, and reliability estimation and optimisation.
  2. Development of tool support for simulation, estimation, and optimization of multi-core applications wrt. power, thermal, and reliability.
  3. Multi-aspect exploration tools, not only operating at design-time, but with also associated run-time support.
  4. Porting parallelizing compiler prototypes to project-specific platforms.
  5. Design of ultra-low power application-specific processors (ASIPs)

WPT5

The WP "Reference Platforms" addresses cross-domain architectural style and a reference architecture template for embedded systems that can be instantiated for two or more application domains to meet the requirements by avoiding fragmentation through a cross-domain development methodology. This included composability, predictability and dependability, under the four application domains addressed in the project.

The work entails with the possible identification of concrete HW and/or SW modules that support the development of a "real-world" product, whose architectural solutions may partially share among two or more of the 4 Application domains depicted in WPA1 to 4.

Though the intention is to make real-world demonstrations of a solution in a specific application domain, the results should also be able to show commonalities for other application domains (ARTEMIS SRA's goal: cross-domain re-use).

The approach will first identifying a cross-domain architectural style with fundamental architectural principles. Then the cross-domain architectural style will be applied for specifying platform services (e.g., communication services, resource management features, Composability, Predictability & Dependability solutions, etc.), to be used as a stable baseline for the development of applications. Emphasis will be placed on domain-independent architectures and services, which can be used across two or more application domains.

WPA1

  • Design and prototype efficient architectural platforms for low-power and energy-efficient large edge routers and switches/aggregators.
  • Development and evaluation of full tool chain to develop firmware and the networking layers, optimizing at the same time for low power and high performance.

WPA2

Surveillance activities will move in the direction of specific and specialized techniques in the area of HW and SW R&D and engineering for audio/video processing for safety and public security. A main aim is to solve some specific issues in the domain of low-scale power efficient computing systems, able to work in harsh or hostile environments, with particular regard to high performance/highly specialized computation and efficient communication along mixed or low bandwidth networks. For this reason, the data collected in the WP will act as useful indication to other WPTs (mostly WPT1-2-3) to indicate a way to improve some specific performances and features of embedded systems to better act in this area of interest.

Great care will be related to show some applications working as demo set for the end of the R&D activities, in an industrial perspective for future proceedings.

Coordinators of the WP will take in charge the action to continuously monitor the shared activities between the partners to avoid unneeded overlaps and handle unexpected conditions involving cross-WPTs tasks.

WPA3

The activity in WPA3 consists in the development of an industrial demonstrator using the results from previous work-packages. The demonstrator will be the proof of concept for the technology developed in this project. It will involve the experimentation with several functions of a smart wireless mobile terminal, including the ability to use several types of radio protocols, of networking, and of applications, including sensor fusion and video playback. Overall system architecture of such equipment will be defined, and blocks will be prototyped.

WPA4

  • Demonstrate the feasibility to run multiple DAB streams on a given Car platform.
  • Design and prototype efficient architectural platforms for low-power and energy-efficient display systems such as a home TV.
  • Demonstrate feasibility of a scalable and embeddable display agent platform for professional markets.